Twelve projects are now approved under India's Semiconductor Mission (ISM). Two more clearances on 5 May 2026 pushed the total to 12 projects with cumulative investment of around ₹1.64 lakh crore, on top of the ten approved earlier. The mission itself was built on a fixed budget: the Union Cabinet approved the Semicon India programme in December 2021 with a total fiscal outlay of ₹76,000 crore, offering support of up to 50% of project cost across fabs, display fabs, compound-semiconductor and ATMP-OSAT units, and chip design.
Put those two numbers side by side and the mission has a problem it hasn't had to confront until now. If every one of the 12 approved projects, worth ₹1.64 lakh crore in total, draws the maximum 50% of project cost the scheme allows, the fiscal support bill comes to roughly ₹82,000 crore. That is already above the ₹76,000 crore the Cabinet set aside for the entire mission back in 2021 (The Signal's calculation). The approvals have grown faster than the outlay was ever built to absorb.
Fabrication is one project in ten
The mission's headline number is investment approved, not fabs built, and the two are not the same thing. As of December 2025, before the two May-2026 approvals, ten ISM projects worth a total of ₹1.60 lakh crore had been approved across six states. Of those ten, only one is an actual wafer fabrication plant: Tata Electronics' Gujarat facility, a ₹91,526 crore project built in technology partnership with Taiwan's PSMC, with a capacity of 50,000 wafer starts per month. The other nine are display, compound-semiconductor, ATMP or OSAT facilities: assembly, test, and packaging capacity, not chip fabrication.
By project count, fabrication is one approval in ten. By money, it is the opposite story: Tata's single fab, at ₹91,526 crore, accounts for about 57% of the ₹1.60 lakh crore approved across all ten projects (The Signal's calculation). India's chip mission is, so far, mostly one very large fab and a wide base of smaller assembly-and-test bets sitting underneath it.
The design layer barely registers
The mission's third leg is domestic chip design, run through a separate Design Linked Incentive scheme. As of January 2026, that scheme supported 24 semiconductor design startups, which had collectively attracted nearly ₹430 crore in venture capital funding. Set against Tata's single fab, the entire design-startup cohort's VC funding comes to under half of one percent of the size of that one project (The Signal's calculation). Design is the part of the mission meant to build India's own chip intellectual property rather than import fabrication and assembly capacity, and on the numbers available it is still a rounding error next to the capital going into physical plant.
How the incentive structures compare
India is not the only government subsidizing chips, and the structures differ. The US CHIPS and Science Act gives the Department of Commerce $52.7 billion over five years, split into $39 billion for manufacturing and facility incentives and $11 billion for semiconductor research and development: a fixed, pre-allocated split decided up front. The European Chips Act is set to mobilise more than €43 billion of policy-driven investment through 2030, an amount the European Commission expects to be broadly matched by long-term private investment. That puts public and private capital on a roughly one-to-one ratio, by design.
India's scheme was built on a similar logic: up to 50% public support alongside at least matching private capital. What is different is timing. The US and EU figures describe a ceiling planned to run through a fixed multi-year window. India's ₹76,000 crore outlay was sized in 2021, and the mission has since approved more projects, faster, than that first budget was built to cover.
The honest objection
The strongest case against reading this as a crisis is that fiscal support is not paid out the day a project is approved, and the government has already shown it will simply add to the outlay rather than let the pipeline stall. The two additional projects cleared on 5 May 2026 are themselves proof of that: the Cabinet topped up the mission's project list once already, and nothing stops it from doing so again. On this reading, ₹76,000 crore was never meant to be a hard ceiling on total investment, only a starting budget for a scheme everyone expected to grow.
That case explains why the mission has not run out of money. It does not explain what the money has been spent on. A bigger top-up buys more of the same mix, not a different one: Tata's single fab, at ₹91,526 crore, already outweighs the other nine projects approved before May 2026 combined (The Signal's calculation), and the 24-startup design cohort is still worth under half a percent of that one fab's cost. Raising the outlay again would fund more of exactly that shape. It would not, on its own, fund a second fab or a bigger design push.
The Signal
The Cabinet can raise the outlay again, as it did when it cleared two more projects on 5 May 2026, and every future approval will still read as progress in the headline. But money was never the scarce thing here. What the numbers show is concentration: fabrication is one approval in ten, one project holds more capital than the other nine put together, and the design layer meant to build India's own chip IP is a rounding error beside it. The number to watch from here is not the size of the next outlay. It is what kind of project the next approval actually is: another assembly line, a second fab, or, for once, a design bet large enough to register. The mission has proven it can fund one giant fab. It has not yet proven it can fund anything else.
Reporting basis: the mission's original outlay and support cap are per the Press Information Bureau's release on the Union Cabinet's approval of the Semicon India programme. The current approval count and cumulative investment figure are per a separate PIB release on the two clearances in May. The prior approval count and investment figure, the detail on Tata Electronics' Gujarat fab built with PSMC, and the Design Linked Incentive scheme's startup count and venture-funding figure all come from one PIB explainer document on India Semiconductor Mission 2.0, cited here as a single origin across three separate facts. The US CHIPS and Science Act figures are per a CHIPS for America fact sheet from the US National Institute of Standards and Technology, and the EU Chips Act figure is per the European Commission's own budget page. The fiscal-support figure, Tata's fab as a share of the other clearances before May, and the design cohort's funding as a share of that fab's cost are The Signal's calculations from those figures.
